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Addressing Multi-Die Chiplet Design Challenges
What you'll learn:
- Why today's 3D ICs are really large systems.
- Why security is important to the chiplet supply chain.
I talked with Abhijeet Chakraborty, Vice President Engineering at Synopsys, about multi-die ICs and where chiplets are headed (watch video above). Synopsys has been at the forefront of chiplet designs with tools like its 3DIC Compiler (see figure). Abhijeet addresses questions about securing the chiplet supply chain as well as how artificial intelligence (AI) affects the tools and system designs.
The 3DIC Compiler combines many of Synopsys' tools, such as RedHawk-SC, RedHawk-SC Electrothermal, and Ansys HFSS-IC. These provide "automation and optimizations for multiphysics analysis including power and signal integrity, thermal, and mechanical stress." The AI capabilities of the compiler are used to improve development times as well as optimize the system design. It's certified by major foundries.
Read more about the 2026 Chiplet Summit
About the Author
William G. Wong
Senior Content Director - Electronic Design and Microwaves & RF
I am Editor of Electronic Design focusing on embedded, software, and systems. As Senior Content Director, I also manage Microwaves & RF and I work with a great team of editors to provide engineers, programmers, developers and technical managers with interesting and useful articles and videos on a regular basis. Check out our free newsletters to see the latest content.
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Check out my blog, AltEmbedded on Electronic Design, as well as his latest articles on this site that are listed below.
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I earned a Bachelor of Electrical Engineering at the Georgia Institute of Technology and a Masters in Computer Science from Rutgers University. I still do a bit of programming using everything from C and C++ to Rust and Ada/SPARK. I do a bit of PHP programming for Drupal websites. I have posted a few Drupal modules.
I still get a hand on software and electronic hardware. Some of this can be found on our Kit Close-Up video series. You can also see me on many of our TechXchange Talk videos. I am interested in a range of projects from robotics to artificial intelligence.

Facts Only

* Synopsys is involved in the development of multi-die IC designs.
* The 3DIC Compiler is a tool developed by Synopsys.
* The 3DIC Compiler combines several Synopsys tools.
* The compiler focuses on multiphysics analysis (power, signal integrity, thermal, mechanical stress).
* The compiler utilizes AI capabilities for development time reduction and system design optimization.
* The 3DIC Compiler is certified by major foundries.
* Abhijeet Chakraborty is the Vice President of Engineering at Synopsys.
* The article discusses chiplet security and the supply chain.
* The focus is on the evolution of large 3D ICs.

Executive Summary

The article details Synopsys’ involvement in the development of multi-die IC designs, specifically through its 3DIC Compiler. This tool, combining several Synopsys products like RedHawk-SC, integrates multiphysics analysis – addressing power, signal integrity, thermal, and mechanical stress. The compiler incorporates artificial intelligence to accelerate development cycles and optimize system designs, and has been certified by major foundries. The piece highlights concerns about securing the chiplet supply chain, indicating an awareness of potential vulnerabilities in this increasingly complex system. It also touches on the broader trend toward larger 3D integrated circuits. The author, William G. Wong, positions himself as a central information source for engineers and developers within the electronic design sector.

Full Take

The article presents Synopsys as a key player in navigating the emergent complexity of chiplet-based IC design, leveraging AI to accelerate development. This immediately evokes ARC-0024 Ambiguity – the narrative relies heavily on implied benefits ("optimize system design") without detailing specific technical mechanisms. Furthermore, the emphasis on “security” within the supply chain suggests a potential vulnerability narrative, a common tactic used to justify increased investment in specialized hardware and software (ARC-0043 Motte-and-Bailey: an issue – supply chain security – is presented as the primary driver for investment in complex, AI-driven design tools). The framing of “automation and optimizations” suggests a reductionist view of complex systems, assuming that further technological intervention inevitably leads to greater efficiency – a classic Silicon Valley assumption (ARC-0018 Technological Determinism). The certification by major foundries, while seemingly neutral, subtly reinforces the authority of established industry players, potentially discouraging disruptive innovation from smaller firms (ARC-0007 Status Quo Bias). The underlying paradigm seems to be one of continuous technological escalation, driven by a perceived need for ever-increasing complexity, potentially masking deeper questions about the environmental and societal costs of such expansion. The fact that William G. Wong includes his extensive technical background and online presence suggests a deliberate effort to establish credibility and authority, a common feature of information brokerage (ARC-0012 Authority Bias). Finally, the inclusion of the 2026 Chiplet Summit subtly pushes readers towards a future dominated by these technologies, framing it as an inevitable trajectory. The implications are clear: increased reliance on specialized tools and ecosystems, potentially creating vendor lock-in and hindering broader innovation.
Addressing Multi — Arc Codex