AMD takes on Intel (and Nvidia) in the robot wars.
AMD is bringing its Strix Halo APUs into the world of physical AI. The new X100 series of processors come with similar specs as the various Ryzen AI Max models floating around in client devices, but they’re tailored for 24/7 operation, with a 10-year lifecycle in embedded applications like robotics.
There are three SKUs that align with the three original Strix Halo models (not the updated versions with 40 CUs). The top-end X199 comes with 16 Zen 5 cores and 40 RDNA 3.5 CUs. The X188 steps down to 12 cores and 32 CUs, while the X168 comes with eight cores and the same 32 CUs. AMD hasn’t shared detailed specifications for each model, but the company says the range goes up to a 5.1 GHz boost clock and 128 GB of unified memory. They also include an XDNA 2 NPU with up to 50 TOPS, a configurable TDP between 45W and 120W, and operating temperature between -40 degrees Celsius up to 105 degrees.
AMD’s range bites back at Intel, which launched a range of Panther Lake SoCs for physical AI at the beginning of the year. Both make an argument for SoCs in robotics, reducing latency when the CPU, AI accelerator, and memory are fragmented across separate chips. The X100 range is just physically larger than Panther Lake, packing much more silicon on the SoC for more powerful deployments.
The company shared a range of benchmarks comparing the flagship X199 against Intel’s Core Ultra X7 358H, a 16-core chip with Intel’s Arc B390 iGPU that has 12 Xe3 cores. AMD claims a lead of 1.2X and 1.3X, respectively, in GeekBench 6.1 and PassMark, as well as 1.5X in an unofficial SPECrate 2017 run looking at integer workloads. In graphics, AMD unsurprisingly takes the edge with 1.4X faster Vulkan and 1.7X faster OpenGL performance (both measured with GFXBench 5 on Ubuntu), as well as a 1.6X lead in Unigine Heaven Extreme.
On the physical AI front, AMD claims a 1.4X improvement in Time to First Token (TTFT) and 3.5X faster tokens per second in Llama-bench, with a Vulkan backend running at a 45W TDP. These results need a massive dash of salt, however.
AMD tested the Ryzen AI Max 395+ “configured to reflect Ryzen AI Embedded X199 specifications.” It tested on the Maple reference board with a 5.1 GHz CPU clock, 2.9 GHz GPU clock, and sustained 45W TDP. The X7 358H, meanwhile, was tested in an MSI Prestige 16 Flip AI+ with an enforced TDP limit of 30W. AMD then “projected” 45W performance on the Intel chip “using scaling factors derived from public benchmark data.”
It’s not exactly an apples-to-apples comparison, in other words. There’s some sort of proxy stand-in or extrapolation of data across all of the benchmarks here, so keep that in mind as we work through the rest of AMD’s X100 announcements.
Get Tom's Hardware's best news and in-depth reviews, straight to your inbox.
AMD X100 Kria SOM and robotics developer platform
View Original
View Original
View Original
View Original
utside of the chips themselves, AMD is offering X100 models as part of a Kria System on Module (SOM) or an integrated robotics developer platform. The Kria X100 board measures 120mm x 120mm and conforms to the standardized COM-HPC form factor. If you’re a developer that wants to develop for the board, AMD is offering its Kria AI robotics developer platform.
It’s a fully-integrated box, leveraging the X100 Kria SOM alongside AMD’s Spartan UltraScale+ FPGA baseboard. AMD says it’s a “turnkey” solution for robotics development, including specialized connectivity for cameras and industrial networking, along with robotic sensors. The platform is available in early access now, and AMD says it’ll be in full production in Q4 of this year. .
AMD shared some benchmarks for the X100 Kria, as well, comparing it to Nvidia’s Thor T5000. These benchmarks weren’t run internally at AMD. They were commissioned by AMD and ran by Open Navigation and Mimix. Critically, the benchmarks didn’t test an X100 Kria board, or at least, not exactly in the form it will take once it’s inside a robot or AMD’s developer box.
Instead, AMD is comparing Nvidia’s Jetson AGX Thor developer kit to a GMKtech EVO-X2 AI mini PC with a Ryzen AI Max+ 395 “configured to reflect Ryzen AI embedded x199 specifications.” Naturally, the thermal and power environment of these chips will heavily influence performance.
View Original
View Original
View Original
View Original
AMD is continuing its attempt to siphon developers away from Nvidia’s CUDA platform for development, as well. It’s HIPIFY tool converts CUDA code to AMD’s HIP C++ portable code, and the company claims it can now handle 70-80% of the “effort” of porting on its own. AMD tested on a Ryzen AI Max+ 395, once again configured to match the X199, and it ported 15 CUDA applications, comprising 1,199 lines of code, to arrive at that 70% to 80% range.
X100 Kria lives at the “brain” of the robotics platform, but AMD envisions an end-to-end solution for humanoid-style robots with its Spartan UltraScale+. Zynq UltraScale+, and Versal AI Edge Gen 2 FPGAs and SoCs
Follow Tom's Hardware on Google News, or add us as a preferred source, to get our latest news, analysis, & reviews in your feeds.
Jake Roach is the Senior CPU Analyst at Tom’s Hardware, writing reviews, news, and features about the latest consumer and workstation processors.
Facts Only
* The X100 series targets embedded applications like robotics with a 10-year lifecycle.
* X199 includes 16 Zen 5 cores and 40 RDNA 3.5 CUs.
* X188 includes 12 cores and 32 CUs.
* X168 includes eight cores and 32 CUs.
* The range supports a boost clock up to 5.1 GHz and 128 GB of unified memory.
* The processors feature an XDNA 2 NPU with up to 50 TOPS.
* Performance measurements compared the flagship X199 against Intel’s Core Ultra X7 358H across various benchmarks.
* AMD claimed a lead of 1.2X and 1.3X in GeekBench 6.1 and PassMark for integer workloads.
* AMD showed 1.4X faster Vulkan and 1.7X faster OpenGL performance in graphics tests.
* In physical AI benchmarks, AMD claimed a 1.4X improvement in Time to First Token (TTFT) and 3.5X faster tokens per second in Llama-bench.
* The X100 Kria SOM is a 120mm x 120mm board adhering to the COM-HPC form factor.
* AMD offered an HIPIFY tool to convert CUDA code to HIP C++ portable code, claiming handling 70-80% of porting effort for 15 CUDA applications.
Executive Summary
Full Take
The narrative centers on AMD's strategic maneuver to enter the physical AI and robotics market by bundling high-performance compute (Zen 5/RDNA 3.5) with specialized NPUs in an embedded package, directly challenging Intel and Nvidia’s established positions. The core tension lies between claimed performance gains from raw chip benchmarks and the necessary contextualization provided by proxy comparisons, especially regarding physical AI metrics like TTFT. The mention of scaling factors derived from public data when comparing against Intel suggests a deliberate attempt to frame competitive advantage within existing, potentially misleading, benchmark ecosystems rather than pure, isolated hardware measurement.
The development of the X100 Kria SOM and developer platform reveals a deeper intention: shifting the development locus away from proprietary software stacks like CUDA towards an open, portable environment, facilitated by tools like HIPIFY. This aims to create an alternative ecosystem for robotics where hardware is seamlessly integrated with an end-to-end solution, potentially bypassing licensing constraints associated with Nvidia's dominance. The caveat that physical performance tests were conducted in highly divergent thermal and power environments (e.g., 45W vs. 30W limits) highlights a structural challenge: performance claims are heavily contingent on the deployment environment, which is not consistently accounted for in cross-comparison. The move towards platform integration signals an understanding that for robotics, the holistic system—hardware, software portability, and developer access—is more valuable than peak benchmark scores alone.
Bridge Questions: If the physical AI metrics rely heavily on extrapolated data from consumer benchmarks, how can developers establish truly independent validation metrics specific to sustained robotic inference tasks? What are the long-term implications if proprietary tooling like HIPIFY proves significantly more efficient than established vendor workflows in large-scale industrial deployment? How does the integration of the Kria platform shift the cost/benefit analysis for robotics developers compared to utilizing dedicated Nvidia solutions or Intel architectures?