Keysight Technologies, Inc. today announced that AttoTude Inc. has expanded its use of Keysight EDA software to manage its full IC design workflow. As a result, AttoTude has reduced its design cycles by more than 50% while achieving first-pass silicon success across advanced RF, sub-THz, and THz tape-outs that underpin its guided-wave interconnect platform.
Design velocity is emerging as a competitive advantage, with global semiconductor revenue forecast to exceed $1.3 trillion in 2026 and AI semiconductors expected to account for 30% of the market. For organizations developing AI interconnect technologies, accelerating silicon development while minimizing costly respins is vital to delivering the required bandwidth, efficiency, and scalability.
AttoTude designs integrated circuits that support per-lane data rates of 200G, 400G, and 800G, where on-chip interconnects behave as waveguides and accurate electromagnetic simulation is essential. With engineers working in parallel on sub-THz and THz subsystems, coordinating workloads without a shared, version-controlled environment makes first-pass silicon success difficult to achieve at scale. With the Keysight Advanced Design System (ADS) platform, AttoTude has cut design cycles to less than six weeks, with designs consistently performing to specification on first silicon.
Utilizing Keysight’s design data management software, AttoTude maintains a single source of truth across its design environment, giving engineers full traceability and visibility at every stage. System-level scenario planning allows the team to explore design trade-offs before committing to silicon, with simulation-to-measurement correlation ensuring results reflect performance. As operating frequencies extend from RF into the sub-THz and THz domains, maintaining consistency between layouts, electromagnetic models, and simulation data becomes critical to delivering reliable silicon.
Richard Chan, ASIC Architect and Development Leader, AttoTude, said: “Developing an ASICs over Dielectric interconnect platform that spans signaling frequencies from 100 GHz to 3 THz requires an exceptional level of design accuracy and simulation fidelity. Keysight’s EDA software has enabled our engineering team to move faster with greater confidence, helping us accelerate development while consistently achieving first-pass silicon success.”
Facts Only
* AttoTude expanded its use of Keysight EDA software to manage its full IC design workflow.
* This expansion reduced design cycles by more than 50%.
* AttoTude achieved first-pass silicon success across advanced RF, sub-THz, and THz tape-outs.
* AttoTude's platform underpins a guided-wave interconnect.
* AttoTude designs integrated circuits supporting per-lane data rates of 200G, 400G, and 800G.
* On-chip interconnects behave as waveguides requiring accurate electromagnetic simulation.
* Engineers working in parallel on sub-THz and THz subsystems coordinating workloads without a shared environment made first-pass silicon success difficult at scale.
* Utilizing Keysight’s design data management software, AttoTude maintains a single source of truth across its design environment.
* System-level scenario planning allows exploration of design trade-offs before committing to silicon.
* Simulation-to-measurement correlation ensures results reflect performance.
* The ASICs span signaling frequencies from 100 GHz to 3 THz.
Executive Summary
AttoTude expanded the use of Keysight EDA software to manage its full integrated circuit design workflow, resulting in a reduction of design cycles by over 50% and achieving first-pass silicon success across advanced RF, sub-THz, and THz tape-outs for its guided-wave interconnect platform. This acceleration is positioned against a market context where semiconductor revenue is forecast to exceed $1.3 trillion by 2026, with AI semiconductors expected to capture 30% of that market. The need for rapid silicon development while minimizing respins is critical for organizations developing AI interconnect technologies requiring high bandwidth and efficiency.
AttoTude designs integrated circuits supporting data rates of 200G, 400G, and 800G, where accurate electromagnetic simulation is necessary because on-chip interconnects function as waveguides. The complexity arises when engineers work in parallel on sub-THz and THz subsystems without a shared, version-controlled environment. The Keysight Advanced Design System (ADS) platform provided AttoTude with the ability to reduce design cycles to under six weeks while maintaining design consistency across layout, electromagnetic models, and simulation data through unified design data management.
Full Take
The narrative centers on the critical nexus between extreme physical complexity (sub-THz/THz physics) and the necessity for integrated, traceable simulation environments in semiconductor development. The core tension is that high-speed, multi-domain design—where interconnects function as waveguides across vast frequency ranges—exacerbates the challenges of parallel engineering. The effectiveness of the Keysight platform is demonstrated not just by speeding up cycles but by solving the systemic problem of information fragmentation inherent in large, parallel teams working on interdependent physics.
The implication for innovation is that achieving breakthroughs in AI interconnects and next-generation bandwidth depends less on incremental component improvements and more on the fidelity and coherence of the simulation pipeline. The pattern suggests that competitive advantage is shifting from raw computational power to systemic design management—the ability to correlate physical reality (simulation) directly with implementation (layout) across complex, multi-physics domains.
The question for scrutiny is whether the reported acceleration masks a shift in complexity burden onto the simulation tools themselves. If the demand for fidelity becomes the primary bottleneck, and if proprietary software like ADS becomes the necessary constraint for achieving reliable first-pass silicon in these advanced regimes, the market dynamic is driven by platform lock-in as much as feature velocity. What limits are placed on maintaining this "single source of truth" when stakes involve physics at the THz scale?
