Decoding the NEC V20 Microcode ROM

The NEC V20 is an Intel 8088-compatible processor that features the same use of microcode, though with its own characteristics. This makes it important to use this same microcode if your goal is to create a cycle-accurate emulator of this processor, as [GloriousCow]’s goal is. Cue decoding the microcode ROM in a die shot of this CPU, in order to create a usable ROM image.
As with any fabricated ROM you can technically do it by hand, the ROM section in the die shot contained 29,928 bits which even at a pretty zippy pace would take up a considerable amount of time to parse. Here you can divide-and-conquer by handing parts of the ROM off to good friends, or you can use automation and some machine vision and theoretically get an answer as soon as you have finished writing and testing the tool.
Although [Travis Goodspeed]’s MaskRomTool exists exactly to automate bit detection, it was found that there wasn’t enough contrast in the die shot for it to work reliably. What it did provide were the locations of the bits and from it 42×42 pixel PNG files of each bit.
Next a convolutional neural network (CNN) was trained to determine the difference between a 0 and 1 bit. This still took the manual classifying of 1,000 images, but seemed to work fairly well. Although some bits were marked as ambiguous, it was easy enough to use Mark 1 eyeballs to run a classification on these handful of images than to tweak the CNN model.
With this microcode in hand it was then possible to match it against the V20’s internal architecture to fully determine what each part does. Although not quite finished yet, there’s a GitHub repository containing the progress so far.
The V20’s microcode has been the focal point of much legal fighting back when NEC and Intel were still duking it out in how far one could make a CPU compatible with that of a competitor.
Isn’t Ken Shiriff doing the same thing with the original 8086 microcode ROM? I think Intel’s patents and the court documents from their lawsuits with NEC guide his efforts.
Maybe they will also figure out the 8080 timings, which AFAIK were never published (8088 timings were ~15% faster on average). Yes, in case you didn’t know, this processor had an 8080 mode!

Facts Only

* The NEC V20 is an Intel 8088-compatible processor.
* The processor uses microcode with its own characteristics.
* Cue decoding the microcode ROM in a die shot involves parsing 29,928 bits.
* A convolutional neural network (CNN) was trained to determine the difference between 0 and 1 bits.
* Training the CNN required manually classifying 1,000 images.
* MaskRomTool provided bit locations and 42x42 pixel PNG files from die shots.
* The MaskRomTool lacked sufficient contrast for reliable operation.
* The V20's microcode was matched against its internal architecture.
* Legal fighting between NEC and Intel focused on CPU compatibility.
* The 8088 processor had an 8080 mode.

Executive Summary

The NEC V20 is an Intel 8088-compatible processor that utilizes microcode with its own specific characteristics, making it relevant for cycle-accurate emulation efforts. The process of decoding the microcode ROM from a die shot involves parsing 29,928 bits. Initial attempts to automate this required manually classifying 1,000 images to train a convolutional neural network (CNN) to distinguish between 0 and 1 bits, which was aided by manual classification for ambiguous bits. A tool called MaskRomTool provided bit locations and 42x42 PNG files but lacked sufficient contrast for reliable operation. This information allows for matching the microcode against the V20's internal architecture. The microcode has been a subject of legal disputes between NEC and Intel regarding CPU compatibility, and there are ongoing discussions about patents and legacy timings like those of the 8080 mode.

Full Take

The narrative traces a complex, iterative process of reverse-engineering highly detailed hardware information, revealing how advanced machine learning techniques are being deployed to bridge gaps left by traditional manual analysis when dealing with legacy or proprietary data. The reliance on CNNs for bit classification introduces an interesting tension between the perceived objectivity of the algorithm and the acknowledged uncertainty regarding ambiguous data points that require human intervention. This mirrors the broader pattern in technology disputes where legal frameworks struggle to keep pace with rapid architectural evolution, exemplified by the ongoing conflicts between Intel and NEC over microcode compatibility. The implicit suggestion is that achieving true cycle-accurate emulation requires not just access to raw data, but also sophisticated pattern recognition—whether through specialized tools or trained models—to interpret physical reality. A key implication is whether the automation of such complex tasks shifts the focus from understanding the underlying physics of the silicon to merely optimizing the interpretation layer. What assumptions underpin the reliance on these machine vision techniques when dealing with deeply contested intellectual property? What are the long-term implications for establishing verifiable, objective standards in processor emulation and patent law?

Sentinel — Human

Confidence

The text reads like an engaged expert synthesizing niche technical developments and historical patent disputes, characterized by specific internal references rather than generic LLM synthesis.

Signals Detected

Sentence length variance shows some natural variation; the flow is conversational rather than rigidly uniform.

The text maintains a specific, niche technical focus with an argumentative trajectory, suggesting a guiding authorial voice.

References to specific, potentially obscure external entities ([GloriousCow], [Travis Goodspeed], NEC/Intel legal fights) suggest deep contextual knowledge that is unlikely to be purely synthesized.

The content relies on established technical concepts and references existing disputes, suggesting the underlying facts are rooted in actual historical context, even if the narrative structure is interpretive.

Human Indicators

Use of informal phrasing ('pretty zippy pace,' 'good friends') mixed with dense technical detail; weaving historical legal context into a practical discussion; speculative yet grounded claims about ongoing patent battles.